The Processor Power Struggle
The average modern vehicle contains over 1,400 semiconductors—silent orchestrators controlling everything from engine timing to immersive infotainment.
For decades, proprietary architectures like ARM dominated this landscape, but a seismic shift is underway.
RISC-V, the open-source instruction set architecture (ISA), is challenging the status quo with unprecedented flexibility and innovation. Born from UC Berkeley research in 2010, RISC-V has evolved into a global phenomenon, with over 3,100 member organizations across 70 countries driving its development .
RISC-V Demystified – Why Open Source Changes Everything
1.1 The Architectural Advantage
Unlike proprietary ISAs, **RISC-V’s open standard** enables royalty-free implementation, eliminating per-chip licensing fees that typically add 10-15% to semiconductor costs . Its modular design combines:
– Base ISA: RV32I (32-bit) or RV64I (64-bit) foundations
– Standard extensions: Customizable add-ons (e.g., vector processing, cryptography)
– Proprietary accelerators: Vendor-specific AI/security enhancements
This layered approach enables designers to strip processors down to essential functions, reducing power consumption by 40% compared to legacy architectures .
1.2 Automotive-Specific Benefits
– Functional Safety: Hardware can be designed with ISO 26262 ASIL-D requirements from the ground up, integrating lock-step cores and memory partitioning
– Security: Transparent architecture allows deep inspection for vulnerabilities, critical for connected vehicles facing 150,000+ monthly attack attempts – Supply Chain Resilience: Multi-sourcing capability mitigates chip shortages by enabling parallel production across foundries
| Table: RISC-V vs. ARM in Automotive Applications | ||
| Attribute | RISC-V | ARM |
| Licensing Cost | $0 (Open standard) | $0.50-$3 per core + royalties |
| Safety Cert | Customizable ASIL-D flows | Fixed Cortex Safety Packages |
| Modification | Full ISA extension rights | Limited configuration options |
| Ecosystem | Rapidly expanding (1100+ automotive members) | Mature but proprietary |
| Security Audit | Full transparency | Opaque “trusted” black boxes |
Europe’s RISC-V Powerhouse
2.1 Strategic Positioning
Founded near Montpellier, France, Cortus SAS leverages 15+ years of semiconductor expertise to deliver RISC-V solutions bridging performance and safety. As a Platinum Founding Member of RISC-V International, Cortus influences critical automotive extensions while shipping IP in over 16 billion devices globally .
2.2 Automotive-Optimized Portfolio
Cortus targets four vehicle domains with RISC-V silicon:
– Body/Chassis Control:
ULYSS1 MCU – 32-bit RV32IMAFC core @120MHz
– ASIL-B certified with hardware diagnostics covering 99% latent faults
– 5µA sleep mode, 10ms wake-up for battery-powered systems
– Pin-compatible with NXP S32K14x for seamless migration
– High-Performance Compute:
MINERVA Platform – 64-bit OoO processor @4GHz
– Fabricated on GlobalFoundries 22FDX FD-SOI
– 11-stage pipeline with speculative execution
– Silicon-validated Linux boot for domain controllers
– ASIL-D ready with lock-step cores and Evita Full HSM
3. Real-World Impact – RISC-V in Motion
3.1 Stellantis Body Control Module
Challenge: Replace ARM-based S32K MCUs in Dodge EVs without software redesign
Solution: ULYSS1’s pin compatibility + AUTOSAR MCAL drivers
Result: 30% lower power consumption at identical 3.32 DMIPS/MHz, with 14% tariff-induced cost increase mitigated through US-sourced packaging
3.2 European SDV Domain Controller
OEM: German premium automaker
Architecture: Zonal compute with central gateway
Cortus Role: MINERVA handles OTA updates + sensor preprocessing
Advantage: 40% faster ASIL-D certification (11 months vs. industry-average 18) through pre-validated safety libraries
4: Competitive Landscape
4.1 RISC-V vs. ARM: The Strategic Divide
While ARM leads in mobile (95% smartphone share), RISC-V dominates customization:
– Qualcomm Snapdragon Ride: Superior AI TOPS (100+), but suffers cache-induced interrupt latency (>50µs) unsuitable for brake-by-wire
– Cortus MINERVA: Achieves deterministic 10µs response via bypassable L1 cache, critical for safety-critical systems
4.2 The RISC-V Ecosystem Race
– SiFive (35% RISC-V auto share): Lead in ADAS processors with X280 AI vector extensions
– AndesTech (25%): Dominates Chinese EV market with ISO 21434-certified security
– Cortus (15%): Differentiates via ASIL-D readiness and EU sovereignty focus
| *Table: Automotive RISC-V Competitive Positioning* | |||
| Vendor | Strength | Weakness | Key Win |
| Cortus | Safety certification speed | Limited AI acceleration | Stellantis body control |
| SiFive | High-performance AI | Higher cost structure | Honda ADAS domain control |
| Andes | China market access | Lacking lock-step cores | BYD battery management |
5: Roads Ahead
The 2030 Outlook
– Market Growth: RISC-V automotive processors to reach $12.4B by 2030, capturing 30% of MCU/MPU markets
– Architectural Shift: ARM’s auto share projected to drop from 65% to 50% as RISC-V gains 18 points
– Cortus Trajectory: Planned 3nm Minerva MPUs (5.5GHz) with integrated AI co-processors target L4 autonomy by 2027
Conclusion: The Open-Road Advantage
RISC-V represents more than technical innovation—it’s a **philosophical shift** toward collaborative, transparent computing. As CARIAD’s Manfred Schlett observes: “An all RISC-V vehicle isn’t far away” .
Cortus exemplifies Europe’s capacity to lead this transition, combining architectural rigor with automotive-grade safety. For OEMs, the imperative is clear: Diversify now or risk architectural obsolescence. Early adopters leveraging RISC-V’s flexibility will dominate the software-defined vehicle era, where the true value lies not in horsepower, but in processing intelligence.
**References**
[1] RISC-V International. “What is RISC-V?” 2024.
[4] RISC-V Automotive Working Group. “Scalability Across the Entire Vehicle.” 2025.
[6] Wawrzyniak, R. “The Rise of RISC-V.” RISC-V International Blog, 2024.
[7] Cortus SAS. “RISC-V Processor.” 2025.
[8] Humennyi, D. “RISC-V Adoption in Automotive.” N-iX, 2024.
[9] Stromasys. “RISC-V vs ARM Processors.” 2025.
[10] Cortus Press Release. “MINERVA OoO Processor Targets Automotive.” Feb 2025.
